Peak detection system

ABSTRACT

A system for detecting the peaks in an analog signal whose amplitude varies with respect to time. The system employs a delta differentiation technique to develop two separate binary differential signals; i.e., a first highly accurate short time constant differential signal and a second relatively noise immune long time constant differential signal. The two differential signals are then logically combined to yield a relatively noise immune output signal which accurately indicates the peaks in the analog signal.

United States Patent Potash PEAK DETECTION SYSTEM Inventor: HananPotash, Canoga Park, Calif.

Assignee:

Filed:

Appl. No.:

Sperry Rand Corporaton, New York, N.Y.

Jan. 25, 1971 US. Cl ..328/l51, 307/235, 307/293, 328/116, 328/147 Int.Cl. ..H03k 5/20 Field of Search ..307/235, 293; 328/150, 151,

References Cited UNITED STATES PATENTS 8/1967 MonradKrohn ..324/77 ALord .328/151 TIME DELAY xt 6 PAT-2 [451 June 6, 1972 3,390,377 6/1968Elliott ..328/151 Primary Examiner-Donald D. Forrer AssistantExaminer-David M. Carter Attorney-Charles C. English, Sheldon Kapustinand William E. Cleaver ABSTRACT 7 Claims, 5 Drawing Figures OUTPATENTEDJUII 5 I972 SHEET 10F 2 BINARY SIGNAL DISCRIMINATOR 16 PEAKDETECTOR x14 ANALOG MAGNETIC SIGNAL HEAD FIG.1

COM RARAT OR t+AT t x X 0 3 PRIOR ART FIG.

(8) ANALOG SIGNAL (b) AILarg AT BINARY DIFF. SIGNALS (c) BISmaII AT INVEN TOR.

HANAN POTASH (dII-F FIG.

LLL 3AM I a...

ATTORNEYS PATENTEDJUH 6 I972 3,668,532

SHEET 2 OF 2 S OUT x TIME DELAY H FILTER AT A x 92 x 0 LOGIC AND TIMINGINVENTOR. HANAN POTASH ATTORNEYS PEAK DETECTION SYSTEM BACKGROUND OF THEINVENTION 1. Field of the Invention This invention relates generally toa system for detecting peaks in an analog signal whose amplitude varieswith respect to time.

2. Description of the Prior Art Many applications require the detectionof peaks in an analog signal. For example only, in digital storagesystems using a moving magnetic recording medium, it is normallynecessary to accurately locate the peaks in a magnetic head outputsignal in order to properly identify the stored data. Typically, thehead output signal is applied to a differentiator circuit which developsa differential output signal whose zero crossing points define the peaksin the head output signal. In designing the differentiator circuit, asfor example when employing a delta differentiation technique, a timeconstant is usually selected which represents a compromise betweenaccuracy and noise immunity. That is, as is well recognized in the art,a differentiator having a short time constant will yield greater peakdetection accuracy but may be unable to distinguish between signal peaksand some noise spikes. On the other hand, a differentiator having a longtime constant will mask out short duration noise spikes but will beinherently less precise in locating the signal peaks.

SUMMARY OF THE INVENTION An object of the present invention is toprovide an improved peak detection system which yields greater accuracyand noise immunity than is afforded by previously known systems.

In accordance with the present invention, first and second differentialsignals, respectively characterized by high accuracy and high noiserejection, are separately developed and then logically combined. In thepreferred embodiment of the invention, a delta differentiation techniqueis employed to develop first and second binary differential signalshaving a relatively large time delay associated with the first suchsignal and a relatively small time delay associated with the second suchsignal. As a consequence of the respective time delays selected, thefirst signal is highly noise immune and the second signal is highlyaccurate. The two binary differential signals are applied to a logiccircuit to develop a binary output signal which switches with theaccuracy contained in the second differential signal but which ignorestransitions in the second differential signal (attributable to noisespikes) not contained in the first signal.

The novel features of the invention are set forth with particularity inthe appended claims. The invention will be best understood from thefollowing description when read in conjunction with the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a block diagram of a typicalmagnetic recording system in which the peak detection system of thepresent invention can be advantageously employed;

FIG. 2 is a block diagram of a typical prior art peak detector employingdelta differentiation;

FIG. 3 is a waveform diagram illustrating in line (a) a typical analogsignal, in line (b) a binary differential signal for a relatively largetime delay, in line (c) a binary differential signal for a relativelysmall time delay, and in line (d) an output signal produced inaccordance with the present invention by logically combining the binarydifferential signals of lines (b) and (c);

FIG. 4 is a block diagram of a preferred embodiment of the presentinvention; and

FIG. 5 is a block diagram of an alternative embodiment of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Attention is now called to FIG.1 of the drawing which illustrates an exemplary application of a peakdetection system in accordance with the present invention. In theapplication represented in FIG. 1, a magnetic read head 10 isillustrated having an output line 12. In digital data storage systems,data is typically recorded on a magnetic medium by the magnetization ofa magnetic material in one of two directions in accordance with one ofseveral readily known data coding formats. The output signal provided onthe line 12 by the magnetic head 10 will be maximum peak for switchingof magnetic polarization from one direction to the other and will be ananalog signal representative of the write current that magnetized themedia. The amplitude of the analog signal will vary as a function oftime and some means is usually provided for detecting the peaks in thatanalog signal so that the transitions in the recorded signal can bedetermined in order to enable discrimination of the relative switchingtimes of the original write current. The magnetic head output line 12 isnormally coupled through appropriate stages of amplification (not shown)to a peak detector 14 which, on output line 16, provides a binary signalwhose signal transitions are indicative of the analog signal peaks. Theoutput line 16 is coupled to a discriminator 18 which then resolves theapplied binary signal into the data recorded.

Attention is now called to FIG. 2 which illustrates a typical prior artpeak detector usable in the system of FIG. 1. As will be seenhereinafter, the peak detector of FIG. 2 employs a delta differentiationtechnique in which the applied analog signal is continually sampled attwo points spaced in time. A signal peak is indicated when thedifference in the two samples crosses zero.

More particularly, the prior art peak detector of FIG. 2 includes asignal input terminal 20 to which is applied an analog signal whoseamplitude is represented by X. The analog signal is applied through atime delay circuit 22, e.g. a delay line, to a first input terminal 24of a comparator circuit 26. The input terminal 20 is directly connectedvia line 28 to a second terminal 30 of the comparator 26. Assuming thetime delay introduced by the circuit 20 is represented by AT, then thesignal amplitude applied to comparator input terminal 24 can berepresented by X, while the signal amplitude applied to input tenninal30 can be represented by X The compara tor 26 operates to provide abinary output signal which has a first level, e.g. l if the sample Xexceeds the sample X, and a second level, e.g. o, if the sample X,exceeds the sample X As is well known in the art, the output signalprovided by comparator 26 will cross 0" at a signal peak.

In actually designing a delta difierentiator peak detector of the typeillustrated in FIG. 2, it is necessary, of course, to select a numericvalue for AT. As is well known in the art, if a very short value of ATis selected, e.g., 5 nanoseconds in a high density recording system, theanalog signal peaks can be very precisely detected. However, byutilizing such a short AT, the system will also detect short durationnoise spikes which may appear in the analog signal waveform. On theother hand, if a large value of AT is selected, e.g., nanoseconds,assuming the same high density recording system previously referred to,then the short duration noise spikes will be masked out but at the costof losing the precision of identification of the analog signal peaks.

More particularly, attention is now called to FIG. 3 which in line (a)illustrates a typical analog signal X, which may be provided by themagnetic head 10 on output line 12. Line (a) of FIG. 3 also illustratesin dotted line, that same analog signal delayed by an interval AT,. Line(b) of FIG. 3 illustrates the binary differential signal which would beprovided at the output of the comparator 26 of FIG. 2 for the case wherecircuit 22 defines a delay equal to AT,. Note that the binarydifferential signal of line (b) exhibits a first transition 30 from a 1to a 0 when the signal amplitude X, exceeds the signal amplitude X Notethat a second transition 32 from a 0" to a l level occurs when thesignal amplitude X exceeds the signal amplitude X,. Note that the signaltransitions 30 and 32 are somewhat imprecise in that they are somewhatdisplaced in time from the actual signal peaks 34 and 36 which theyrepresent. However, also note that the differential signal of line (b)is immune to short duration noise spikes 40 which are small enough so asnot to cross the delayed amplitude waveform X Line of FIG. 3 illustratesthe binary differential output signal from comparator 26 for a delay ATin circuit 22, con-- siderably shorter than the delay AT,. Note that thesignal transitions 44 and 46 in the differential signal of line (c) muchmore precisely define the actual signal peaks 34 and 36. However, notealso that the differential signal of line (c) is susceptible to thenoise spike 40 which because of the short duration of delay AT,intersects the amplitude waveform X The noise spike 40 will thereforeproduce the signal transitions 48 and 49 in the differential signal ofline (c).

In view of the foregoing considerations, prior art peak detector designsof the type shown in FIG. 2 utilize a time delay AT selected torepresent a compromise between high accuracy and high noise rejection.

In accordance with the present invention, in lieu of selecting a singletime delay which represents a compromise between optimum noise rejectionand accuracy characteristics, two binary difierential signals,substantially corresponding to the signals illustrated in lines (b) and(c) of FIG. 3, are generated and then logically combined to yield abinary output signal having the high noise immunity associated with thelong time delay signal and the high accuracy associated with the shorttime delay signal. More particularly, the binary output signal generatedin accordance with the present invention is illustrated in line (d) ofFIG. 3. Note that it includes signal transitions 50 and 52 which occurin time synchronism with the accurate signal transitions 44 and 46 ofthe differential signal of line (b). Note however, that the signal ofline (d) masks out the signal transitions 48 and 49 of the differentialsignal of line (c).

Attention is now called to FIG. 4 which illustrates a preferred peakdetection system embodiment in accordance with the present invention,for developing the output signal of line (d) of FIG. 3. The system ofFIG. 4 includes first and second comparators 60 and 62 which are bothsupplied with amplitude signals X, available at the output of time delaydevice 64. The analog signal X is applied to the input temiinal 66 ofthe time delay circuit 64 and in addition is connected via line 68 toone input terminal of the comparator 60. The second input terminal tothe comparator 62 is connected to a tap 70 on the time delay device 64.Thus, the comparator 60 continually looks at amplitude sample X, and anamplitude sample delayed by the interval AT, therefrom. The comparator62 continually looks at the amplitude sample X, and a sample delayed bythe interval AT therefrom. Note that in this arrangement, comparator 60always switches to the new l or 0 state before comparator 62 to thusallow simple logic combining of the outputs of comparators 60 and 62 todevelop the desired output signal of FIG. 3 (d). In a typical highdensity disc recording system, AT, may be selected equal to I00nanoseconds and AT, equal to 20 nanoseconds.

Thus, the comparators 60 and 62 of FIG. 4 respectively provide binarydifferential output signals as represented in lines (b) and (c) of FIG.3. The output temiinals of comparators 60 and 62 are both connecteddirectly to the input of an AND gate 72 and through inverters 74 to theinput of an AND gate 76 The output of AND gates 72 and 76 arerespectively connected to the set and reset input terminals of aflip-flop 78. Thus, whenever both comparators 60 and 62 define outputlevels of I," the flip-flop 78 will be switched to a l level. Thus, thetransition 52 in line (d) of FIG. 3 will occur in response to thetransition 46 appearing in line (0) of FIG. 3. On the other hand, whencomparators 60 and 62 both define output levels equal to 0, theflip-flop 78 will be reset. Exemplary of this is the transition 50 ofline (C!) of FIG. 3 in response to the transition 44 of line (c). Notethat the transitions 48 occuring in line (c) of FIG. 3 will not switchflip-flop 78.

Although FIG. 4 illustrates a preferred implementation for developingthe output signal of line (d) of FIG. 3 to achieve both high accuracyand high noise rejection, it is recognized that alternativeimplementations can be utilized to achieve essentially the same result.For example, FIG. 5 illustrates an arrangement in which the comparators60 and 62' develop substantially the same binary difierential signals aswere developed by the comparators 60 and 62 of FIG. 4. However, in theimplementation of FIG. 5, the input signals to comparator 60' aredeveloped by passing the analog input signal X through a bandpass orlowpass filter to remove any short duration ripple or noise therefrom.Thus, the filter 90 would for example remove the noise spike 40. Theoutput of filter 90 is coupled directly to one input of the comparator60 and tluough a short time delay circuit 92 to a second input of thecomparator 60. The effect of the filter 90 is to mask out short durationnoise spikes but in so doing, it of course adversely effects theprecision of the signal transitions and thus approximates thecharacteristics of the differential signal illustrated in line (b) ofFIG. 3. The comparator 62' of FIG. 5 receives the analog input signaldirectly on one input terminal thereof and through a time delay 94 on asecond input terminal thereof. In the implementation of FIG. 5, the timedelays introduced by devices 92 and 94 may be identical. The outputsignals produced by the comparators 60 and 62' are then logicallycombined in a similar manner illustrated in FIG. 4 to derive an outputsignal as represented in line (d) of FIG. 3.

From the foregoing, it should now be recognized that an improved peakdetection system has been disclosed herein which yields a highlyaccurate and highly noise immune output signal.

Although particular embodiments of the invention have been described andillustrated herein, it is recognized that modifications and variationsmay readily occur to those skilled in the art and, consequently, it isintended that the claims be interpreted to cover such modifications andequivalents.

What is claimed is: 1. A system for detecting the peaks in an analogsignal whose amplitude varies with respect to time, said systemcomprising:

first means for comparing the amplitude of said analog signal at time(t) with the amplitude of said analog signal at time (t+AT,) and forproviding a first binary differential signal having a first level whenthe amplitude at time (t) exceeds the amplitude at time (t+AT,) and asecond level when the amplitude at time (t+AT,) exceeds the amplitude attime (t);

second means for comparing the amplitude of said analog signal at time(t) with the amplitude of said analog signal at time'(t+AT and forproviding a second binary differential signal having a first level whenthe amplitude at time (t) exceeds the amplitude at time (t+AT and asecond level when the amplitude at time (t+AT,) exceeds the amplitude attime (t);

device means providing an output signal capable of defining at leastfirst and second levels; and

logic means responsive to said first and second differential signalssimultaneously defining first levels for switching said device meansoutput signal to said first level and to said differential signalssimultaneously defining second levels for switching said device meansoutput signal to said second level.

2. The system of claim 1 wherein the time interval at AT, isconsiderably greater than the time interval at AT,.

3. The system of claim 1 including means for filtering out highfrequency components from said analog signal prior to applying it tosaid first means.

4. A system useful in combination with a magnetic read head fordetecting the peaks in an output signal provided thereby whose amplitudecan vary with respect to time, said system comprising:

first means producing a first differential signal representative of thepolarity of the amplitude difference of said output signal at two pointsin time (t) and (t+AT second means producing a second difierentialsignal representative of the polarity of the amplitude difierence ofsaid output signal at two points in time (t) and (t-l-AT- and thirdmeans responsive to said first and second differential signals forproducing a logic output signal which defines a first state when thepolarity represented by both said first and second difi'erential signalsis positive and a second state when the polarity represented by bothsaid first and second difierential signals is negative.

5. The system of claim 4 wherein said first and second differentialsignals respectively produced by said first and second means are eachbinary signals having a first level when the polarity of the amplitudedifference represented thereby is positive and a second level when thepolarity of the amplitude difference represented thereby is negative.

6. The system of claim 5 wherein said third means includes a flip-flopcapable of selectively defining set and reset states; and

logic gate means responsive to said first and second differentialsignals for switching said flip-flop to said set state when said firstand second differential signals simultaneously define said first leveland to said reset state when said first and second difierential signalssimultaneously define said second level.

7. The system of claim 6 wherein AT 23AT,.

I I t I

1. A system for detecting the peaks in an analog signal whose amplitudevaries with respect to time, said system comprising: first means forcomparing the amplitude of said analog signal at time (t) with theamplitude of said analog signal at time (t+ Delta T1) and for providinga first binary differential signal having a first level when theamplitude at time (t) exceeds the amplitude at time (t+ Delta T1) and asecond level when the amplitude at time (t+ Delta T1) exceeds theamplitude at time (t); second means for comparing the amplitude of saidanalog signal at time (t) with the amplitude of said analog signal attime (t+ Delta T2) and for providing a second binary differential signalhaving a first level when the amplitude at time (t) exceeds theamplitude at time (t+ Delta T2) and a second level when the amplitude attime (t+ Delta T2) exceeds the amplitude at time (t); device meansproviding an output signal capable of defining at least first and secondlevels; and logic means responsive to said first and second differentialsignals simultaneously defining first levels for switching said devicemeans output signal to said first level and to said differential signalssimultaneously defining second levels for switching said device meansoutput signal to said second level.
 2. The system of claim 1 wherein thetime interval at Delta T1 is considerably greater than the time intervalat Delta T2.
 3. The system of claim 1 including means for filtering outhigh frequency components from said analog signal prior to applying itto said first means.
 4. A system useful in combination with a magneticread head for detecting the peaks in an output signal provided therebywhose amplitude can vary with respect to time, said system comprising:first means producing a first differential signal representative of thepolarity of the amplitude difference of said output signal at two pointsin time (t) and (t+ Delta T1); second means producing a seconddifferential signal representative of the polarity of the amplitudedifference of said output signal at two points in time (t) and (t+ DeltaT2); and third means responsive to said first and second differentialsignals for producing a logic output signal which defines a first statewhen the polarity represented by both said first and second differentialsignals is positive and a second state when the polarity represented byboth said first and second differential signals is negative.
 5. Thesystem of claim 4 wherein said first and second differential signalsrespectively produced by said first and second means are each binarysignals having a first level when the polarity of the amplitudedifference represented thereby is positive and a second level when thepolarity of the amplitude difference represented thereby is negative. 6.The system of claim 5 wherein said third means includes a flip-flopcapable of selectively defining set and reset states; and logic gatemeans responsive to said first and second differential signals forswitching said flip-flop to said set state when said first and seconddifferential signals simultaneously define said first level and to saidreset state when said first and second differential signalssimultaneously define said second level.
 7. The system of claim 6wherein Delta T1 > or = 3 Delta T2.